Field
The present disclosure relates to a gate driving circuit and a display device including the same, and more particularly, to a gate driving circuit capable of reducing glitches and a display device including the same.
Description of the Related Art
Flat panel displays (FPDs) have been employed in various electronic devices such as mobile phones, tablet PCs, notebook computers as well as televisions and monitors. Recently, for example, a liquid crystal display device (hereinafter, referred to as “LCD”) and an organic light emitting diode display (hereinafter, referred to as “OLED”) have been used as an FPD. Such a display device includes a plurality of pixels, a pixel array configured to display an image and including a plurality of pixels, and a driving circuit configured to control each of the plurality of pixels to transmit or emit a light. The driving circuit of the display device includes a data driving circuit configured to supply a data signal to data lines in the pixel array. Further, the driving circuit includes a gate driving circuit (or a scan driving circuit) configured to sequentially supply a gate signal (or a scan signal) synchronized with the data signal to gate lines (or scan lines) in the pixel array. Furthermore, the driving circuit includes a timing controller configured to control the data driving circuit and the gate driving circuit.
Each of the plurality of pixels may include a thin film transistor configured to supply a voltage of a data line to a pixel electrode in response to a gate signal supplied through a gate line. The gate signal swings between a gate high voltage (VGH) and a gate low voltage (VGL). That is, the gate signal has a pulse shape. The VGH is set to be higher than a threshold voltage of the thin film transistor in a display panel. The VGL is set to be lower than the threshold voltage of the thin film transistor. The thin film transistors in the pixels are turned on in response to the VGH.
In recent years, as display devices have been manufactured to be thin, a technology of embedding a gate driving circuit and a pixel array in a display panel has been developed. The gate driving circuit embedded in the display panel is known as a “gate in panel (GIP) circuit”. Herein, the gate driving circuit includes a shift register for generating a gate signal. The shift register includes a plurality of stages dependently connected to each other. The plurality of stages generates an output in response to a start signal and shifts the output according to a shift clock. Therefore, the gate driving circuit may generate a gate signal by sequentially driving the plurality of stages in the shift register.
Each stage in the shift register includes a Q node for charging a gate line, a Q bar (QB) node for discharging the gate line, and a switch circuit connected to the Q node and the QB node. The switch circuit charges the Q node in response to a start signal or an output voltage of a previous stage so as to increase an output voltage of the gate line and then discharges the QB node in response to an output voltage of a following stage or a reset signal.
As such, each stage is driven to output a gate signal depending on an output signal of a previous stage and an output signal of a following stage. Thus, if a noise signal such as a glitch is included in the output signal of the previous stage, the Q node may be charged in response to the noise signal of the previous stage and a gate signal may be output at an undesired time. Further, if a noise signal such as a glitch is included in the output signal of the following stage, the QB node may be discharged in response to the noise signal of the following stage and a gate signal may not be output at a desired time. That is, an output signal of a stage is dependent on output signals of a previous stage and a following stage, and, thus, there may be a problem with stability of a gate signal due to a noise signal such as a glitch.
Accordingly, there is a need for a gate driving circuit capable of reducing a problem caused by a glitch by controlling output signals of a previous stage and a following stage, and a display device including the same.